You can't fake this feeling when the $4 microcontroller development board can be used as cutting-edge technology in the 1980s. [Amen] This is the case with working transputers built with Raspberry Pi Pico.
To fully understand the transputer, you should check out [Jenny List]'s longer article on the subject, but in the final analysis, we are talking about a chip architecture that has almost been forgotten by time. For parallel computing, each transputer chip has four serial communication links for connecting to other transputers. [Amen] I wanted to play with this architecture from the beginning. It was expensive back then and today, and finding multiple chip machines is difficult and expensive. However, the RP2040 chip found on the Raspberry Pi Pico made him feel that it was the perfect way to simulate the design of a transputer.
The RP2040 chip on the Pico board has two programmable input/output blocks (PIO), and each PIO has four state machines. This matches perfectly with four transputer links (each link is bidirectional, so you need eight state machines). In addition, the link speed specification is 10 MHz, which is completely within the capability of Pico, and since the RP2040 runs at 133 MHz, it is conceivable that the simulation core can approach the 20 MHz maximum speed of the original transputer.
The hardware has been started successfully. In order to understand the actual situation, [Amen] purchased some link adapter chips (IMSC011) and connected them to the computer through the Arduino Mega to use the keyboard and display. The transputer architecture allows code to be loaded via ROM or via link. The latter is currently running. The future plan is to find a better system to compile the code, because now the only way is to run the original INMOS compiler on the DOS of the virtual machine.
Listen to [Amen] explaining the project in the first of six video series (so far). You can find links to other videos on his YouTube channel.
Wow, this is really cool! ! ! I wanted to play with the transponders before, but I never had the opportunity to do it. I am particularly interested in Atari's transputer-based ABAQ system. I will pay close attention to this project. Thanks for highlighting this item! ! !
I think somewhere I might still have the original data sheet (book) that records the chip of the transputer series. There is a complete ecosystem accompanied by the CPU. They are "edge processors" and include peripheral devices such as disk controllers.
Ah, that's really interesting. I think you don’t know the part numbers of those edge processors? I know IMSC011 (obviously) and IMSC012, which are the same thing, and IMSC004, which is a crossbar switch for the link. I don't know any other chips, really want to see what they have, maybe I can get some.
I have worked at INMOS before. IMS-M212 is a disk controller. This is one of the 16-bit (2xx) ranges, not the 4xx and 8xx 32-bit ranges.
Are you in contact with Archipel in France?
Use commercial equivalent: xCORE processor programmed in xC. You will feel at home :)
Brought back the Occam2 programming memory of the university.
It was great to see the transputer on HaD (this article and Jenny List article).
Part of my degree involves programming transputers. I really like programming with Occam. I have considered buying some transponders from eBay, but there are already too many items that need attention, and I don't need another one.
He should be able to find a compiler that runs on Unix. Archipel uses Indigo to program and control their Volvox supercomputer. I have the original Indigo but no drive or system! If anyone knows where, please shout out. http://www.regnirps.com/VolvoxStuff/Volvox.html
I am very interested in the Occam compiler that runs on Linux and generates transputer object code so that I can easily compile Occam programs. When you say Unix, do you mean the original INMOS cross-compiler? I have seen these, and getting them to compile on Linux (such as building the compiler itself) requires some porting work. The irony is that some compilers can compile to other processors, but in order to get the transputer code, I have to run the INMOS compiler on DOS.
Archipel Volvox is run by SGI Indigo of UNIX running SGI, called IRIX. Indigo has an interface card with some Transputers on it. I assume that it is used to run the code during program development (it is also connected to two Transputer cassettes. 44 Transputers IIRC). Unfortunately, when I got this system, there were no drives, and I never found the software I needed. Somewhere, it may still exist, and I am looking forward to IRIX's complete compiler suite. If they are written in C, I think they can be transplanted anywhere. Otherwise, they will be R3000 specific. I have never even seen another Volvox.
You should consider trying DOSbox, which can emulate DOS on any CPU architecture or operating system. It is much simpler than setting up a VM and installing MSDOS.
I may have a Linux version. I can ask the person in charge of those compilers that I have the Linux st20 version. I will check if it can still output the t450 version.
I may also have a Solaris version for Occam.
An amazing project-sparking so many ideas and ideas-and a good example of how to use the RP2040 to explore multi-core and multi-processor architectures at low cost. One wonders how many new ideas were proposed in the 70s and 80s but were not implemented at the time because the cost of building the hardware was too high.
At that time, I went from HEMA in Germany to NESTOR in the United States to adjust the Nestor software for the HEMA transponder board to run the Nestor RCE neural network on multiple transponders https://www.hema.de/
There is a modern commercially available equivalent, from some people in XMOS now (such as David May).
The xCORE processor is an effective transputer for steroids: up to 32 cores and 4000MIPS/chip, scalable, FPGA-like IO, ensuring hard real-time.
The xC language is actually Occam with different syntax and hard real-time extensions.
I found them very easy to program; from the beginning, I ran my first application in a day. The application calculates the conversion on the two 62.5Mb/s inputs and transfers the result to the PC via USB. Make real-time embedded fun again.
They are not intended for general use, nor are they suitable for hobbyist use. I remember hobbyists were very interested when they first appeared, but when they saw that these were not universal devices, they quickly went elsewhere. The strange architecture is limited to on-chip memory. Then there is the fixed I/O port model they use, which I find very annoying.
Too bad, they don't have an Occam or Oberon version. A beautiful fashion language will make programming fun
"The weird architecture is limited to on-chip memory."
Don't know where you got it from-they have a built-in DRAM controller and a complete external memory bus. They *can* only run on internal storage (for very limited applications), but they are certainly not limited to this. The memory capacity of TRAM can reach MBytes (large in the 1980s)
The series I use range from T2xx, T4xx, T8xx to T9000, from 1987 to the mid/late 1990s, in the architecture from single processor to about 90 processors, mainly used for real-time image processing and control. occam and C.
"Only on-chip memory"
I'm not sure where you got this idea from.
I used almost the entire series/variants, from T2xx, T4xx, T8xx, all the way to T9000, from the mid-80s to mid-90s, in a single processor configuration, up to about 100 mixed T4xx and T8xx, it is PC hosting It is not uncommon for B0xx boards to have more memory than the host computer. All the processors I often use have external buses and built-in DRAM controllers.
Of course *may* only use them with internal memory, but for very limited applications (Mandelbrot farm or similar)
Agree, it was weird (initially, it was only about occam, although I used C extensively later), but an excellent platform for rapid prototyping.
The closest thing I found to processor Lego-very interesting.
You confuse the transponders and xmos things. This article is about transputers, but the comments above refer to xmos devices.
I like XMOS devices, but I am surprised that they do not introduce HAD more. At least, they strike a good balance between a powerful microcontroller and FPGA-like I/O. This is all before considering the aspects of parallel computing and the corresponding scalability. xC is easy to use, but sometimes you may need to remember what the language and hardware are actually doing, at least for older devices that I have been using.
I did some Occam programming with Transputer in university. It is very slow-the Occam compiler runs on a single Transputer node. Interesting language.
Interesting Transputer fact: Later, the design was acquired by SGS Thompson and produced the ST20 embedded processor core, which is widely used in TV set-top boxes. But there is only one node. However, I don't know if it is still up to date.
I used to like to use the chip machine during the day. We have loads and build sonar systems around them, which makes parallel programming a breeze. You can scale from a software process to multiple hardware-based processes with no or almost no software changes, which means developing code on a chip machine running an X process, and then running it on 15 processors running 1 process.
In many ways, they are ahead of the times, but they just lost their motivation. We have the initial chip of T9000, it looks great on paper, but it has never worked, we can say it is dead when it arrives.
I think with more funds and a better business model, it may become an important structure, but it is not the case. In addition, it also prevents the transformation of massively parallelization in advance, so maybe it is just ahead of its time, but I still encounter design problems, I think we can do this with some transputers
Take me back to C't Magazine to read about them. I really want to make my Amiga 2000 a supercomputer :)
Same Here. :) It's just that they are too expensive. So I am waiting for some to enter the second-hand market. But when they arrived at the second-hand market very close to me, I had lost all interest.
That brought me back! I developed the transputer system and sold many transputer modules and motherboards. Then Inmos developed their own module and my market disappeared.
How is a transputer different from using things like MPI across multiple chips?
"The RP2040 chip on the Pico board has two programmable input/output blocks (PIO) and four state machines in each PIO. This perfectly matches the four transputer links (each link is bidirectional, so you Eight state machines are required)."
People would think that Ti OMAP PRU (programmable real-time unit) can be used to do the same thing.
https://youtu.be/Z37U1Q4R2CA
Wow! Go down the road of memory! I built a Transputer array in the graduate school to "quickly" solve the two-dimensional FFT to perform frequency-wavenumber analysis on the array EMG signal. I wrote an article on Circuit Cellar Ink about a PC-made transponder add-on board that supports 4MB local DRAM and is compatible with T400, T414, T800 and T805 transponders:
http://www.prutchi.com/wp-content/uploads/2021/08/PRUTCHI_Transputer_ArticleCCI_1995.pdf
I don't even know it's the same thing. Very cool. It reminds me of TIS-100, but it is real and it is a steroid.
Cool. I have never worked with a transputer, but I want to, and know some people who do this. I have to check his channel.
Oh my Steve, are you still alive?
Scarecrow's argument: You can't claim that they are anything other than embedded MCUs with unique advantages.
The architecture is not surprising, but is designed to work seamlessly with high-level languages. If you understand the concepts in Transputer and Occam, it may take 30 minutes to understand the xCORE/xC ecosystem!
This lover found them very friendly!
It can do what other high-performance MCUs cannot do: guarantee the timing of key parts of the code. NB Running the code, measuring and hoping that you encounter the worst case does not guarantee anything.
For some time, I have been interested in XMOS/xCore processors, but for now, the price of chips/development boards keeps pushing them to the next day...
In 1990, I got an entry-level job as a computer system architect in Provo, Utah. They were shipping Transputer hardware at the time.
They sell all kinds of hardware. They have a SCSI interface connected to the 16-bit T212. Another startup in the region is using this hardware and other processor boards to prototype RAID-based SQL servers. I think they eventually sold their stuff to Novell; after that, they never heard anything about it.
They have an entry-level board with T400. That is a 32-bit processor, no hardware floating point, only 2KiB built into the chip (not cache; RAM is actually in the memory map, which means you can run small programs on the chip without external RAM) And there are only 2 serial interfaces.
They provided a variety of products for T414 (and later T425), each chip has 1 MB to 4 MB of RAM, and a processor can be installed on a board at most. Both of these are 32-bit processors, no hardware floating point, 4 KiB and 4 serial interfaces are built in the chip. T425 is the second-generation chip, and T400 is a simplified version of T425.
They provided T800, T801 and T805. These are 32-bit processors with hardware floating point, 4 KiB built-in chips and 4 serial interfaces. The operating frequency of T805 is 30 MHz, while others are up to 20 or 25.
We have a circuit board that provides a serial link compatible with the Transputer for the ISA bus, while all other circuit boards use only power and ground. We can stuff 20 boards into a shell, insert the ISA serial link card into the host system, connect them all, and then start cracking. Starting such a system requires uploading a boot program that is actually a virus. It will propagate through the cores in the system, guiding each core and setting them up to receive any program we want. There is no operating system; all development "runs on bare metal."
I have a 286-based host with at least one 32-bit processor, any time. I am using C (with some extensions), Occam 2 and Transputer assembly language. At that time I already had 6502 and 8080 assembling experience. Transputer is a different beast. It has a 3-level hardware stack instead of registers (you have to add two numbers through PUSH, PUSH, ADD, and POP) and you can insert the port number, the start address of the buffer, and the length of the buffer on the stack Invoke specific instructions. It is microcoded into the chip instead of using SIO and other access.
The benchmark I ran at the time, and later ran on other machines, compared the 30 MHz T805 with the 486DX2-66. Back to the era when 33 MHz 386 is the fastest product you can get from Intel.
A common statistic associated with multiprocessing systems is the "linear acceleration percentage". For example, if the actual speed of your 4-core machine is 3.2 times the single-core speed, then 3.2 times / 4.0 cores = 0.80 = 80% linear acceleration.
We have the Mandelbrot rendering program and the ray tracing program, and it is no exaggeration to say that they provide a linear acceleration of 95%. 20 cores will provide 19 times the real-world speed increase. Message delivery through these serial links is very effective.
Once, my 286 host had an ISA serial link card and 4 processor cards x 4 T805 (a total of 16 cores, each core has 4 MiB of RAM). The serial link is the bottleneck. Benchmark performance... I later found out that a P-II running 266 or better can keep up with that equipment.
I did all this in the summer of 1990. When did 486DX-2 come out? Or P-II.
CSA released a low-cost student kit for $250 in 1990-you only need to add your own DRAM. I know because I helped develop this toolkit (I worked at Inmos) and made a deal to provide the previous compiler version at a nominal cost. Because of its low cost, there is no support, so I wrote a complete manual for people to learn everything by themselves-I wrote it. I still have my first prototype kit, and somewhere I keep hanging it on an old PC with an ISA bus in case I have time to take it out and use it again.
There is some confusion about the circuit board-it was mentioned that 44 transputers and transputers can only operate from internal memory. The famous B042 board is because the factory packed a batch of T800 transputers and managed to make the bonding wires run to the wrong pins. Instead of throwing them away, because the transputer can run small programs in the internal memory, some boards are made with only the transputer on it-the standard size board happens to use 6 x 7 as the array, and one space is reserved for serial interconnection ——So named 42 (The Hitchhiker's Guide to the Galaxy was the most recent at the time, and we all know that 42 is the answer to life, the universe, and everything). Therefore, highly parallel programs such as the Mandelbrot Set that run very fast on 1 cycle of memory can be ported to these boards-we can get 10 in a rack with a graphics card, so a Very cheap but limited supercomputers of the time. Ray tracing is also possible, but due to the size of the memory, it needs to be configured into three parallel pipelines, and each node is cross-connected, so one B042 gives 14 effective pipeline nodes.
Just wait for the XCORE-AI of XMOS to come out. This should bring the price down to what you can actually do; put 100 of these beasts together without breaking the bank. The XCORE design is indeed a direct descendant of Transputers. Transputer's ideas are great, but they are too expensive, and their speed was left behind by mainstream processors in the early 90s. Why spend a lot of time programming parallel cpus when a single cpu with a standard operating system and standard compiler runs your calculations much faster. Yes, in principle you can expand to many CPUs, but they must all be on a single complex board with fast enough links. I built and used these systems in the late 80s and early 90s. It's fun, but it's not worth pursuing a real application. The idea of parallel CPU and fast serial link was resurrected by XMOS (led by David May) at the end of 2009. I think the first real silicon came out in 2009. Again, a lot of fun and explosion of the past! For one project, I actually purchased a 16 cpu (64 core XK-XMP-64 in total) prototype system. XMOS hyped up running their XCORE processors in parallel, but somehow this never succeeded. I have lost interest for a few years, and since 2015, they seem to be only interested in single-CPU audio applications for their CPU, leaving all parallel enthusiasts ignored. Since last year, XMOS has hyped its cheap new XCORE-AI cpu, but until now, all of this has been a hot air. This may be related to the current shortage of chips. Since this CPU should be very cheap (about $1?), this may trigger the resurgence of massively parallel systems at a very low price. I was really interested, but didn't hold my breath.
If you still use the "real thing (tm)" and need to get a zero in your tram farm... http://www.geekdot.com/pitram-ahead/
The main architecture of Topologix T1000 was developed by myself, Gary "ROD" Rodriguez served as IRAD at Mycroft Machines consulting company, and communicated to a startup company, I named it Topologics. Jesse Awaida, the founder of Storage Tech, the manufacturer of IBM mainframe disk and tape drives, funded the new company Topologix. Topologix is interested in Lisp and C programmers with AI aspirations, and apparently has not studied Godel, Turing, Hofstadter, or Igor Aleksander. Their first step was to ensure my service as the chief architect. The second step is to clear the Inmos OCCAM programming code. Is it flexible? Similar to programming building blocks. I extended the architecture to support the 64MB DRAM of each Transputer MPU-with 1MBit DRAM-to support massively parallel LISP across enterprise or university campuses-looking for host sites in various laboratories and computing centers-at the time- —Sun MicroSystems is very friendly in a universe, they are everywhere. Therefore, the 9U form factor allows laboratories to purchase single or multiple boards and become part of a campus-wide parallel computer system. All of these were novel at the time. PIXAR looked at their own implementation at the time, and then wisely discarded it. Other features of this series of VME 9U boards: Including about 15” x 15” 8 layers and 4 32-bit T800 transputers C012 32-FDX link switch The fifth processor uses Inmos 16-bit transputers for link management And out-of-band system services, including "soft" interrupt hardware paging memory management, no timing loss, DRAM 32-bit VME 9U interface page calculation during RAS The only board in the Sun III (MC68K) and Sun IV (SPARC) VME backplane Interoperability-successful through PCB design-the only "fix" is the single wire visible next to the P2 connector
The subsequent revision B.. E was built to compress the SIPP package into a small SMT package, allowing the use of a smaller form factor DRAM SIPS, which allows the T1000 to occupy a slot in the VME chassis once, Topologix will 24 Inmos, the manufacturer of the Transputer, a motherboard bundled with a 96 MPU parallel system, later adopted several key T1000 features of the architecture in their T9000 MPU. Topologix launched its IPO on Wall Street on October 4, 1988. The company made a profit and received US$50,000 per T1000 9U board, mainly for tax purposes. Inmos has repeatedly postponed the development of T400 to T800 feature set (floating point, etc.), which did not help our situation, which means that we found ourselves competing with the i586 Pentium series, rather than competing with i386. Over the years, I worked 80 hours a week. In the decades since then, it has been riding, still discovering and constructing new things. Please refer to the sysRAND laboratory page on ResearchGate.net (Berlin)
Just last week, I saw a Transputer in the excellent National Computer Museum https://www.tnmoc.org/
This seems to be the crowd asking this:
Many years ago, I purchased an ISA adapter from a company called "Nth Computing". It seems to be some kind of image processing coprocessor, with a T800 and a T414 on it, I would like to know more about it.
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